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Low-Power Hardware Implementation of a Support Vector Machine Training and Classification for Neural Seizure Detection

1 min read · Thu, Apr 25 2019

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Circuits FPGA smo

Heba Elhosary, et al., "Low-Power Hardware Implementation of a Support Vector Machine Training and Classification for Neural Seizure Detection." IEEE Transactions on Biomedical Circuits and Systems 13 (6), 2019, 1324. In this paper, a low power support vector machine (SVM) training, feature extraction, and classification algorithm are hardware implemented in a neural seizure detection application. The training algorithm used is the sequential minimal optimization (SMO) algorithm. The system is implemented on different platforms: such as field programmable gate array (FPGA), Xilinx Virtex-7 and

Rolf Krause Research Group (R-Krause)

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